Algebraic Models of Superscalar Microprocessor Implementations: A Case Study
نویسندگان
چکیده
In this chapter, we extend a set of algebraic tools for microprocessors (Harman and Tucker [1996], Harman and Tucker [1997] and Fox and Harman [1996a]) to model superscalar microprocessor implementations, and apply them to a case study. In superscalar microprocessors, the timing of events in an implementation can be substantially different from that of the architecture that they implement. We develop the existing correctness models of Harman and Tucker [1996] and Harman and Tucker [1997] to accommodate the more advanced timing relationships of superscalar processors, and consider formal verification. We illustrate our tools and techniques with an in-depth treatment of an example superscalar implementation, first seen in a simpler form in Fox and Harman [1996a]. We are particularly interested in models of time and temporal abstraction. Clocks divide time into (not necessarily equal) segments, defined by the natural timing of the computational process of a device: for example, the execution of machine instructions, or some system clock. We formally relate clocks by surjective, monotonic maps called retimings. In the case of superscalar microprocessors, the normal relationship between ‘architectural time’ and ‘implementation time’ is complicated by the fact that events that are distinct in time at the architectural level can occur simultaneously at the implementation level. Interesting recent work on pipelined microprocessors includes Windley and Coe [1994] on UINTA, a processor of moderate complexity, and its verification in HOL (Gordon and Melham [1993]); and Miller and Srivas [1995a], Miller and Srivas [1995b] on AAMP5, a more complex processor, and its verification in PVS (Owre et al. [1994]). In both UINTA AND AAMP5, the development and consideration of timing abstraction (see also Windley [1993] and Cyrluk [1993]) is conceptually similar to our own (Harman [1989], Harman and Tucker [1996] and Harman and Tucker [1997]). However, we put less emphasis on
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